1. Field of the Invention
The present invention relates to a plasma display device drive method.
2. Description of the Related Art
In recent years increases in the size of display screens of display devices have been accompanied by demands for the devices to be made thinner, and a variety of thin display devices have been reduced to practice. One area of particular interest in thin display devices is alternating-current discharge-type plasma display panels.
FIG. 1 of the accompanying drawings illustrates an overview of the structure of a plasma display device that contains such a plasma display panel.
In FIG. 1, a PDP (plasma display panel) 10 includes m column electrodes D1 to Dm, and n row electrodes X1 to Xn and n row electrodes Y1 to Yn, laid out so as to intersect with the column electrodes. The row electrodes X1 to Xn and Y1 to Yn form (define) the first display line through the nth display line in the PDP 10 using individual pairs of row electrodes Xi (1≦i≦n) and Yi (1≦i≦n). Discharge spaces filled with an electrodischarge gas are formed between the row electrodes D and column electrodes X and Y. The various intersections between the respective row and column electrodes, which contain the electrodischarge spaces, are each structured with an discharge cell that emits red-colored light through electrodischarge, an discharge cell that emits green-colored light through electrodischarge, or an discharge cell that emits blue-colored light through electrodischarge.
Since each of the discharge cells produces its light through the use of an electrical discharge phenomenon, each discharge cell has only two possible states, either a “lit” state, which produces light at a specific brightness, or an “extinguished” state. In other words, only two brightness levels can be expressed. Given this, the drive device 100 functions as a gradation drive using a subfield method to provide intermediate gradation brightness displays corresponding to the inputted image (video) signals for the PDP 10, where the discharge cells are laid out so as to form a matrix.
In the subfield method, the display period (process) of a single field is divided into N subfields, and each subfield is assigned in advance a period over which the discharge cell is to continually emit light. For each of the subfields, each of the individual discharge cells is caused to emit light continuously over only the period that is assigned to the subfield, in response to the inputted image signal. This makes it possible to express various intermediate gradations of brightness levels (namely 2N brightness levels) where N is the number of subfields (these brightness levels will be referred to as “gradations” below), through a combination of the subfields that are caused to emit light during the display period of a single field.
FIG. 2A and FIG. 2B of the accompanying drawings show examples of a light-emission drive format according to the subfield method described above.
In the light-emission drive format shown in FIG. 2A, the display period (process) for a single field is divided into three subfields, i.e., subfield SF1 through subfield SF3. In each of these subfields SF1 to SF3, there is a full reset process Rc, an address process Wc, and a light-emission sustaining process Ic. In the last subfield SF3 only, there is an erase (eliminate) process E.
In each of the full reset processes Rc, the drive device 100 applies a reset pulse with a positive polarity to each of the row electrodes X1 to Xn of the PDP 10 and also applies a reset pulse with a negative polarity to each of the row electrodes Y1 to Yn. The application of these reset pulses causes a reset discharge to occur in each of the discharge cells. When this occurs, the reset discharges cause the formation of a certain amount of wall charge that is uniform for all of the discharge cells when a selective erase (eliminate) address method (will be described below) is used. On the other hand, when a selective write address method (will be described below) is used, these wall charges that had been formed in all of the discharge cells are all eliminated.
The next process is the address process Wc. In the address process Wc, the drive device 100 selectively causes the discharge cells in respective horizontal raster lines (one line at a time) to discharge (referred to as “selective discharges”) in response to the inputted image signal. The selective discharges proceed downwards from the top horizontal raster line. Each horizontal raster line (scanning line) is referred to as “display line”. If a driving scheme based on the selective erase address method is used, residual wall charges are eliminated from within the discharge cells for those discharge cells in which the selective discharges take place, and the discharge cells become “extinguished discharge cells”. On the other hand, in other cells for which the selected discharge are not caused, the wall charge that is formed during the full reset process Rc is maintained as it is, and the discharge cells become lit discharge cells. Alternatively, when a driving scheme based on the selective write address method is used, wall charges are formed in those discharge cells which are selected as discharge cells in the selective discharge process, and these discharge cells become lit discharge cells. On the other hand, no wall charge is formed in other discharge cells for which the selective discharge does not take place. These discharge cells therefore become extinguished discharge cells.
The subsequent process is the light-emission sustaining process Ic, in which the device drive 100 causes the discharge cells which have become “lit discharge cells” to continuously discharge (sustaining discharge) over a period that is assigned to the subfield concerned. The following periods are assigned to the light-emission sustaining process Ic of the respective subfields in the light-emission drive format shown in FIG. 2A.
SF1:1
SF2:2
SF3:4
Consequently, the total period of light emission resulting from the sustaining discharge performed during the single field display period can be one of eight types, from “0” to “7” as shown in FIG. 3A, depending on the pattern in which the subfields are combined to cause the emission of light. Because the human eye perceives brightness according to the period over which light is emitted per unit time, the drive based on the light-emission drive format as shown in FIG. 2A makes it possible to express eight gradations of brightness.
On the other hand, in the light-emission drive format shown in FIG. 2B, the display period (process) for a single field is divided into seven subfields SF1 to SF7. In each subfield, the address process WC and the light-emission sustaining process Ic are implemented as described above. In the light-emission drive format shown in FIG. 2B, the full reset process Rc, which is implemented for each subfield process in the drive in FIG. 2A, is performed only for the first subfield SF1. The light-emission sustaining processes Ic for the subfields SF1 to SF7 are assigned light-emission periods as follows:
SF1:1
SF2:1
SF3:1
SF4:1
SF5:1
SF6:1
SF7:1
When driving based on the light-emission drive format shown in FIG. 2B, the combination patterns of subfields related to light emission can cause eight patterns light-emission, as shown in FIG. 3B. In the light-emission drive format shown in FIG. 2B, the full reset process Rc is performed only in the first subfield SF1. Consequently, once a discharge cell is set to be an extinguished discharge cell in the address process Wc of a particular subfield, it becomes impossible to switch this discharge cell to an lit discharge cell in any of the subsequent subfields. In other words, in the light-emission drive format shown in FIG. 2B, the transition from a lit discharge cell state to an extinguished discharge cell state within a single field display period can occur a maximum of one time, as shown in FIG. 3B. The total period of light emission within the field display period can be one of eight types, from “0” to “7” as shown in FIG. 3B, depending on the combination patterns of the subfields wherein light is emitted. Accordingly, it is possible to express eight levels of intermediate gradations.
As described above, a drive based on the subfield method, as shown in FIGS. 2A, 2B, 3A and 3B, makes it possible to display, on the screen of the PDP 10, images that have intermediate gradations of brightness on an eight-level scale.
However, in display devices that display images through the use of light-emitting phenomena accompanying electrical discharges, such as plasma display panels, it is also necessary to have electrical discharges that are accompanied by the emission of light that is not part of the image to be displayed. In particular, because all discharge cells emit light at the same time due to the reset discharge that occurs at the full reset process Rc, there is a problem with a substantial reduction in contrast when displaying images that are not bright.
In consideration of this, the rising and falling edges of the reset pulses RPx1 and RPy1, which are applied to the row electrodes X1 through Xn and to the row electrodes Y1 to Yn in order to cause the reset electrical discharge, are each made to be more gradual, as shown in FIGS. 4A and 4B of the accompanying drawings. FIG. 4A shows the various types of reset pulses applied to the PDP 10 in the full reset process Rc, along with the state of light-emission in each discharge cell (CR, CG, and CB) when the PDP is driven using the selective erase (deletion, elimination) addressing method. FIG. 4B shows the various types of reset pulses that are applied to the PDP 10 during the full reset process Rc, along with the state of light emission in each discharge cell (CR, CG, and CB) when the PDP is driven using the selected write address method. These reset pulses RPX1 and RPY1, of which waveforms have gradual rising and falling transitions, cause the reset emissions (discharges) to be weaker, and thus reduce the amount of light that is emitted during the electrical discharge. This reduces (suppresses) the contrast deterioration when displaying a low-brightness image. However, the weaker the electrical discharge, the less adequate the amount of priming particles formed in the discharge space, and the less adequate the wall charge produced. This makes the selective discharge in the address process Wc unstable. In order to avoid this, a second reset pulse RPX2 and a second reset pulse RPY2 are applied alternating between the row electrodes X and the row electrodes Y, as shown in FIG. 4A and FIG. 4B, immediately after the application of the reset pulses RPX1 and RPY1. In this instance, an electrical discharge occurs in the discharge space each time the reset pulses RPX2 and RPY2 are applied. Additionally, priming particles are produced and accumulated in the discharge space each time these discharges occur. As a result, enough priming particles are accumulated in the discharge space to stabilize the selective discharges.
However, due to the increase in the number of times there are discharges during the full reset process Rc, the amount of extraneous light not involved in the image creation increases. This causes a reduction in contrast.